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Simon Deleonibus Launches New Book Series on Intelligent Nanosystems

Posted on 14th Sep 2018

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A few years ago, I was invited to edit a book series on Intelligent Nanosystems. The series attracts many well-known international authors and researchers on today’s hottest topics of nanosystems and nanoelectronics. The books in the series are intended for educators, graduate students, researchers, and engineers. The series offers readers the opportunity to enjoy the highest-level tutorial reports on the most advanced research results and will be useful in strengthening their own research or simply satisfying their curiosity and enhancing their knowledge.

From Nanomaterials to Nanosystems
The notion of “system” has evolved in the past and will continue to evolve. In the field of nanosystems and nanoelectronics, the downscaling of components has made the integration of more and more complex functions possible, and it can be handheld today. The telephone was a complex technology accessible to few people until the mid-20th century and remained a fixed home or office appliance in most cases. Today, however, one can access information, services, and leisure applications with multimodal communication from a mobile phone! It is challenging to meet the growing demand for energy-efficient and sustainable technologies not necessarily available with today’s current schemes. In this context, alternative devices and approaches are benchmarked for sensing, actuation, data storage, and processing. This evolution already calls for new technology integration paradigms, which leave the floor for integrated intelligent nanosystems to match the low power and high performance by hybrid and heterogeneous CMOS in 2D/3D and give opportunities to emerging devices, exploiting the remarkable properties of nanomaterials. These topics are at the heart of the micro-nanoelectronics research worldwide and the future industry challenges. This is what the Pan Stanford Series on Intelligent Nanosystems aims to highlight. 

Volume in the Series 
Vol. 1
Intelligent Integrated Systems: Devices, Technologies, and Architectures (2014)
ISBN 9789814411424 (Hardcover), 9789814411431 (eBook)

Vol. 2
Integrated Nanodevice and Nanosystem Fabrication: Materials, Techniques, and New Opportunities (2017)
ISBN 9789814774222 (Hardcover), 9781315181257 (eBook)

Vol. 3
Emerging Devices for Low Power and High Performance Nanosystems: Physics, Novel Functions, and Data Processing (2018)
ISBN 9789814800112 (Hardcover), 9780429458736 (eBook)

About the Series Editor
Simon Deleonibus holds a PhD in applied physics from Paris University (1982). He retired from CEA-LETI in 2016 as the chief scientist after 30 years of research on micro-nanoelectronic device architectures. Before joining CEA-LETI, he worked with Thomson Semiconductors in Grenoble (1981–1986), where he developed and transferred advanced microelectronic devices and products to production. He is a visiting professor at Tokyo Institute of Technology, Japan, since 2014; National Chiao Tung University, Taiwan, since 2015; and The Chinese Academy of Sciences, China, since 2016. He holds the titles of Chevalier de l’Ordre National du Mérite (2004) and Chevalier de l’Ordre des Palmes Académiques (2011).

Dr Deleonibus’ technical contributions are vast. At Thomson Semiconductors, he investigated, developed, and produced new generations of ICs using polycide gates. He invented the contact/via plug principle in 1984, which has become a standard process in the micro/nanoelectronics industry worldwide. This invention has made multilevel interconnects in modern integrated circuits possible. For this invention and the development of applications, Simon Deleonibus was awarded the 2005 Grand Prix de l’Académie des Technologies. 

During his time in CEA-LETI, he achieved a world record for the smallest MOS transistor with 20 nm gate length and 4 nm channel length (1999). For the first time, a European laboratory was the world leader on MOSFET scaling research. In his work, he demonstrated the non-pure ballistic nature of transport in short channels as well as the limitation to supply voltage scaling due to the polysilicon gate. He also oversaw the Si divisions in the fields of innovative logic devices, memories, power and energy harvesting devices, MEMS sensors and actuators, devices for analog/RF applications, 3D integration (sequential and parallel) and packaging, advanced materials, substrate and surface science, advanced alternative patterning (multi-e-beams, DSA resists, etc.), and advanced surface characterization techniques in the frame of the largest nanocharacterization platform in Europe. The developed technologies have been transferred to STMicroelectronics, SOITEC, Freescale, NXP, IBM, and many SMEs in Europe. The research he directed with his teams contributed to establish the foundation and enhance the development activities of several CEA-LETI spinoff companies.

Contact:

Jenny Rompas
Founder, Publisher and Director


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